Drive Mode : Check for F2F , If they not available will go for Virtual.
- Own and bring up emulation cutdowns cutdowns for large SoC and IP blocks to improve emulation performance and turnaround time.
- Adapt and port test benches to run efficiently on hardware emulation platforms.
- Debug and resolve issues related to AVIPs and transactors within the emulation environment.
- Lead the bring-up and setup of emulation platforms ( Zebu) to ensure readiness for verification runs.
- Collaborate closely with RTL designers, verification, and emulation infrastructure teams to ensure high coverage and quality.
- Troubleshoot test failures on emulators and provide actionable feedback to design and DV teams.
- Release validated emulation cutdowns
- Help customize the SOC design for the FPGA/Emulation platform Duties include modeling, debugging,
creating and running validation tests, as well as supporting SW debugging
- Work with SOC design engineers, verification, systems and software team to achieve pre-silicon emulation and prototyping goals
Experience
- Hands-on experience with Synopsys Zebu emulators.
- Robust skills in debugging and developing AVIPs and transactors.
- Proficiency in SystemVerilog, UVM, and scripting languages such as Python, Perl, and Shell.
- Solid understanding of SoC architecture, verification methodologies, and hardware/software co-debugging.
- Experience with waveform analysis tools (Verdi, DVE).
- Ability to analyze, reduce, and optimize test cases while maintaining coverage and validity.
- Excellent problem-solving and communication skills, with a collaborative mindset.