- Design and develop high-quality ASICs using Verilog and VHDL.
- Implement ATPG Pattern Generation Validation and scan insertion techniques.
- Develop and validate DFT RTL/Gate-Level Implementation designs.
- Collaborate with cross-functional teams to ensure successful project delivery.
- Utilize Siemens/Synopsys/Cadence Tools for design and development.
- Participate in code reviews and contribute to improving overall code quality.
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