"Candidates with 5 to 7 years experience is mandatory
Experience in Full chip RTL integration is preferred
Experience with ASIC/SoC development flow including synthesis/timing constraints development, Static Timing Analysis closure, resolving P& R congestion issues etc.
Experience in RTL Synthesis
Scripting experience
Experience integrating IP's like PCIe, USB, Ethernet etc.
Should be able to lead a team of 2 to 3 Entry Level engineers "
Key Responsibilities
1. To leverage design expertise to ensure that software and products exhibit user-friendliness, intuitiveness, and alignment with user expectations, contributing to the creation of seamless user experiences.
2. To lead a team of designers, provide guidance, and ensuring the delivery of high-quality design solutions in alignment with the overall business goals.
3. To present design concepts and play a crucial role in shaping the overall design vision and strategy.
4. To stay abreast of industry trends, emerging technologies to drive innovation and excellence in design.
📌 Senior Design Lead (India)
🏢 HCLTech
📍 India
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