- Required Experience:
- 2 to 4 yrs
- Location:
- Delhi-NCR or Bangalore
- Openings
- 20
- Education
- BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication)
Core Competencies:
- Worked on SoC level testbench and verification environment
- Testbench architecture, coding and positive understanding of design issues in RTL
- Testbench generation, testvector creation, simulations, gate level simulations
- Hands on with System Verilog and Assertion based verification methodology
- Atleast 2years of experience on HVL (System Verilog, Vera, Specman, E, VMM, OVM, UVM)
Simulation Tools:
- NCSIM/VCS/ModelSim/Questa
Added Advantage:
- Knowledge of RTL coding styles
- Low power verification (UPF/CPF) would be an added plus
- Experience on System C would be an added plus
- Worked on protocols like AMBA AHB/AXI, MIPI, PCI Express, SATA, USB
Email your resume to
[email protected] and mention position/location in the subject.
📌 Design Engineer (Delhi)
🏢 Truechip Solutions
📍 Delhi