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Robust experience in Reset, Security, RAS, GPIO, Clocking, and Power Management.
x86 Core experience is an added advantage.
Experience in Core Verification, SoC Emulation, Performance, UPI, and related areas.
Intel experience is an added advantage.
Candidates should have experience with C2C (Chip-to-Chip) protocols, C2C loopback, Unified Memory, Packaging, Encryption, and related technologies.
Experience in SystemC and relevant protocol verification is preferred.