5 to 8 years of experience in design verification in a rapid-paced development environment.
Solid understanding of the complete verification lifecycle, including test planning, testbench development, execution, debug, and coverage closure.
Strong hands-on experience in System Verilog and UVM.
Good working knowledge of PCIe and AMBA protocols.
Minimum 1 year of hands-on experience in PCIe Gen5 or Gen6 is mandatory.
Proven expertise in developing UVM testbench settings and verification components such as drivers, monitors, scoreboards, and agents from scratch.
Self-motivated and result-oriented, with strong debugging, analytical, and communication skills.
Preferred candidate profile
📌 Job Openings For Design Verification Engineers Bengaluru (India)
🏢 XQwave
📍 India
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