BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
2+ years of Design Verification experience with SV/UVM
Solid background on functional verification fundamentals, workplace planning, test plan generation, workplace development is a must.
Design Verification experience verifying complex designs and leading projects from concept to verification closure.
Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.
Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage.
📌 Lead Design Verification Ddr Engineer Bengaluru (India)
🏢 Cadence
📍 India
Reply to this offer
Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.