Responsibilities
Participate in the complete IP and system design cycle, including microarchitecture development, RTL coding, verification, synthesis, FPGA prototyping, and silicon bring-up.
Support IP delivery, FPGA prototyping, and silicon validation activities.
Solve complex design and verification challenges through creative and practical solutions.
: Collaborate with cross-functional teams to ensure high-quality design implementation and successful product delivery.
Required Skills And Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or a related field.
8 to 10 years of experience in digital logic design and integration involving ARM cores, bus protocols, and interconnect architectures.
Robust expertise in microarchitecture development, Verilog RTL coding, and IP/SoC verification.
Experience in subsystem development and/or SoC RTL integration.
Proven experience performing LINT, CDC, and RDC sign-offs to ensure the highest design quality.
Solid understanding of the complete SoC design flow, from high-level architecture through synthesis.
Experience with Synopsys VCS, RTL simulators, Verdi, spyglass tools.
Experience conducting IP integration reviews and backend (BE) report reviews to support concurrent engineering efforts.
Hands-on laboratory experience with FPGA validation and post-silicon bring-up.
Working knowledge of wireless technologies and standards, including Wi-Fi (IEEE 802.11), Bluetooth, IEEE 802.15.4, or other networking controller architectures and implementations is preferred.
📌 Senior Ip/soc Design Engineerft Rm 4422 Pune (India)
🏢 Source right
📍 India
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