The Mixed Signal Development Group is responsible for delivering analog and mixed-signal IP to divisions within the Company. We work with leading edge CMOS processes to produce analog integrated circuits for wireline applications. From T1/E1 to 112Gb/s SERDES, we enable technology that allows our products to interface to the outside world.

As a member of the Mixed-Signal Development Group, the candidate will be supervised by a team leader/manager, and be engaged in the design of PLLs, high speed SERDES, integrated filters, ADCs, DACs, and other analog building blocks.

Responsibilities:
Lead and support Mixed-Signal IP from conception through post-tapeout phase, including lab testing, customer bring-up and debug
Interface and communicate with internal business units on IP support and technical topics
Lead analog design developments




Work with 3rd party analog IP vendors for integration into products
Design and architect CMOS analog and mixed-signal integrated circuits
Ownership of circuit and system specifications

Requirements/Qualifications:
Masters Degree or PhD in Analog, Mixed-Signal or RF IC design strongly preferred
15+ years of industry experience in the area of mixed-signal CMOS circuit design
Experience in leading/managing a analog team is a prerequisite.
Experience with high-speed SERDES/Clocking circuits is an asset
Knowledge of layout issues
Experience with circuit simulators (HSPICE, Spectre, etc)
Experience with Cadence Design Setting is an asset
Robust written and oral communication skills
Ability to quickly ramp on current projects

📌 Senior Manager, Analog Design Bengaluru
🏢 Connectpro Management Consultants
📍 Bengaluru