Position Requirements
Minimum BTech/BE degree in Electrical/Electronics/Computer science
8+ years of solid digital logic design experience in hands-on and/or technical leadership.
Robust technical orientation to lead the activities -architecting and Design of key digital blocks in SoC Designs.
Must have worked with cross-functional product development teams and the designs must be realized in Silicon (ASIC tapeouts, not FPGA)
Hands-on experience in the development of optimal micro-architecture by analyzing power, performance, and area tradeoffs
Experience with Lint, CDC, formal equivalence, ECO flows and scripting
Solid Knowledge in Processor/SoC architecture.
Valuable verbal and written communication skills to logically drive the discussions effectively with teams spread geographically
Experience in technically mentoring junior engineers
Experience with participating in Post Silicon issue debug is a definite plus
Knowledge of DSP fundamentals will be an added advantage.

📌 Staff Engineer, Design Verification Engineering Hyderabad (India)
🏢 Analog Devices
📍 India