27 Sep
|
Quest Global
|
Bengaluru
27 Sep
Quest Global
Bengaluru
Job Requirements
in IP/Sub-system GLS and Low-Power, PCIe experience would be an add-on.
Verifying ASIC design, architecture, and micro-architecture of memory sub-systems/units using advanced verification methodologies.
Developing test plans, tests, and verification infrastructure for complex IPs/sub-systems.
Building reusable bus functional models, monitors, checkers, and scoreboards following coverage-driven verification methodology.
Performing functional coverage-driven verification closure and working with architects, designers, and verification teams.
Collaborating with RTL designers, architects, and cross-functional teams to understand design intent and identify verification gaps.
Identifying coverage holes, developing targeted tests, and tracking progress to closure.
Participating in specification reviews, design reviews, and verification plan reviews.
📌 Senior Engineer Ip Bengaluru
🏢 Quest Global
📍 Bengaluru