We are looking for talented
Analog Layout Engineers
with strong experience in advanced FinFET technologies to join a leading semiconductor project for a global client.
Key Requirements
✅5-8 years of relevant Analog Layout experience ✅ Expertise in
FinFET technologies (7nm / 3nm) ✅ Solid understanding of
Analog/Mixed Signal Layout concepts ✅ Experience working on advanced node designs and physical implementation ✅ Candidates from
non-Intel client projects preferred
Additional Information Immediate to short joiners (0-30 days) will be given preference. Work Location: Bangalore.
📌 Analog Layout Engineer |5-8 Yrs | Immediate Joiners ,Bangalore (India)
🏢 Capgemini
📍 India
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