Job Description

RTL Design Engineer

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Experience: 7–20+ Years

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Location: Bangalore

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Role: Senior / Lead / Principal RTL Design Engineer

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Job Overview

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We are looking for experienced RTL Design Engineers with a strong background in Microarchitecture and Digital Design to work on complex semiconductor designs. The ideal candidate should have strong hands-on experience taking designs from microarchitecture/specification through RTL implementation, verification, synthesis and sign-off.

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Key Responsibilities

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- Understand and contribute to microarchitecture specifications and design requirements.
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- Translate microarchitecture into high-quality, synthesizable RTL using Verilog/SystemVerilog.
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- Design and implement complex IP, subsystem, SoC, CPU/GPU or processor blocks.
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- Participate in microarchitecture definition, design reviews and RTL architecture discussions.
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- Develop optimized RTL considering performance, power, area (PPA) and design complexity.
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- Work closely with Architecture, Verification, Physical Design and STA teams.
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- Perform RTL simulation, debugging and functional issue resolution.
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- Support lint, CDC, synthesis, STA and other design-quality checks.
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- Analyze and resolve timing, area, power and functional issues.
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- Drive design closure and support integration of RTL blocks into larger SoC designs.
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- Mentor junior engineers and contribute to RTL coding standards and design methodologies.
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Required Skills

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- 7–20+ years of experience in RTL Design / Digital Design.
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- Strong hands-on experience with Verilog/SystemVerilog.
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- Robust understanding of Microarchitecture and Digital Logic Design.
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- Experience in designing complex IP/SoC/subsystem blocks.
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- Good understanding of ASIC design flow from specification to implementation.
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- Strong knowledge of RTL coding, synthesis, lint, CDC and STA.
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- Experience with PPA optimization and timing closure.
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- Strong debugging and problem-solving skills.
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- Experience working with cross-functional teams including DV, Architecture and Physical Design.
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Preferred / Good to Have

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- Experience with CPU, GPU, AI/ML accelerators, interconnects or high-speed interfaces.
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- Experience in ARM/processor-based SoC designs.
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- Knowledge of low-power design methodologies.
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- Experience with formal verification and design-quality checks.
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- Experience leading RTL design teams or mentoring engineers.
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Candidate Profile

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Candidates should have a strong microarchitecture foundation, excellent RTL coding skills, and experience owning complex blocks from microarchitecture through RTL and design closure.

📌 Senior / Lead / Principal RTL Design Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru