NWe are looking for skilled and motivated DFT Engineers with 6–12 years of experience to join our Engineering team. If you thrive in a cooperative workplace and have a strong track record in DFT implementation and design, we encourage you to apply!
NKey Responsibilities:
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Lead and contribute to DFT implementation for complex SOCs
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Drive robust integration and collaborate on STA, LEC, CLP, and project-wide DFT activities
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Apply advanced IJTAG understanding and debug skills at the top DFT level
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Spearhead ATPG coverageimprovement, timing simulations, and post-silicon debugging
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Guide and mentor small teams, ensuring timely task closure and effective stakeholder communication
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nKey Requirements:
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6–12 years of hands-on DFT experience (E08/E09 candidates)
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Deep knowledge in DFT, STA (Static Timing Analysis), LEC (Logic Equivalence Check), CLP, and system integration
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Strong experience with IJTAG and proficiency in debugging through the complete DFT flow
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ATPG (Automatic Test Pattern Generation) expertise, especially in coverage, timing, and real silicon debug
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Proven leadership in team management and project delivery
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nWhy MediaTek?
nBe a part of an cutting-edge, fast-growing environment with opportunities to work on world-class projects and cutting-edge technology!