EdgeSilica is looking for a Physical Design Engineer with 5+ years of hands-on experience to join our semiconductor engineering team in Hyderabad.
Key Responsibilities
Execute physical design activities from floorplanning through signoff.
Work on placement, Clock Tree Synthesis (CTS), routing, and timing closure.
Analyze and resolve timing, congestion, and physical design issues.
Support physical verification activities including DRC/LVS.
Collaborate with design, STA, and verification teams to achieve project milestones.
Required Skills & Experience
5+ years of experience in Physical Design.
Hands-on experience with Floorplanning, Placement, CTS, Routing, and Timing Closure.
Positive understanding of physical design flows and signoff.
Experience with DRC/LVS and physical verification.
Experience with industry-standard EDA tools is preferred.