We are looking for a skilled SoC Verification Engineer with robust expertise in end-to end SoC verification, subsystem integration, and advanced verification methodologies.
Key Responsibilities:
Develop and execute verification strategies for complex SoC architectures.
Create detailed verification plans for SoC, subsystem, and IP-level validation.
Build and maintain UVM/SystemVerilog-based testbenches for SoC verification.
Verify integration of multiple IPs, processors, interconnects, memory subsystems, and peripherals.
Work on: o Functional verification o Performance verification o Power-aware verification o Regression management
Develop reusable VIPs, scoreboards, monitors, assertions, and coverage models.
Debug RTL, gate-level, and system-level issues.
Perform coverage closure (functional/code/assertion).
Collaborate with architecture, design, firmware, and validation teams.
Support silicon bring-up and post-silicon validation if required.
Required Skills:
Solid expertise in SystemVerilog, UVM, Verilog
Experience in SoC/Sub-system verification
Hands-on knowledge of: o AMBA protocols (AXI/AHB/APB) /Processor-based verification /Interrupts, memory, DMA, coherency
Experience in assertion-based verification (SVA)
Familiarity with simulation tools: o Synopsys VCS /Cadence Xcelium/Siemens Questa
Scripting knowledge: Python/Perl/Shell
Robust debugging and problem-solving skills
Preferred Qualifications:
Experience in low-power verification (UPF/CPF) • Exposure to formal verification/emulation platforms • Knowledge of firmware/hardware interaction • Experience with performance and system validation