We are looking for a

Senior EDA Engineer with hands-on expertise in

Cadence Virtuoso-based Analog/Mixed-Signal design environments, SKILL scripting, CDF customization, OpenAccess (OA) APIs, and foundry PDK/CDK integration . The role will focus on developing and automating schematic, layout, simulation, verification, and design-data workflows while collaborating with AI/EDA and software development teams on advanced design automation. 1. Key Responsibilities Develop, maintain, and optimize

Analog/Mixed-Signal IC design flows using Cadence Virtuoso and associated EDA tools. Develop and optimize

SKILL scripts for schematic, layout, verification, and design-environment automation. Create, modify, and manage

CDF parameters, configurations, and callbacks for Cadence device libraries. Work with

OpenAccess (OA) database APIs to read, write, and manipulate schematic, layout, connectivity, and library data. Develop EDA automation utilities using

C++, Python and/or Tcl with OpenAccess APIs. Build automation workflows supporting schematic/layout integration, PDK/CDK validation, design-data migration, and QA . Integrate and validate foundry PDK/CDK devices, pCells, symbols, DRC/LVS decks, and simulation models . Troubleshoot

PDK integration, OA database consistency, schematic-layout synchronization, and EDA environment issues . Automate schematic, library, simulation, and design-data processing workflows. Develop reusable automation scripts and document technical processes and EDA workflows. Support simulation automation and extraction/processing of

PSF or raw simulation data .



Collaborate with AI and software teams to integrate EDA tools with AI-assisted analog design and automation platforms. 2. Required Qualifications 3–10 years of hands-on experience with

Cadence Virtuoso Analog/Mixed-Signal design flows . Strong expertise in

Cadence SKILL scripting for schematic and layout automation. Proven experience creating and customizing

CDF parameters / CDF callbacks . Hands-on experience with

OpenAccess (OA) Database API and OA schema . Programming or scripting experience using

C++, Python and/or Tcl . Solid understanding of foundry PDK/CDK structures and integration . Experience with pCells, symbols, device models, layout generators, and design-rule decks . Knowledge of

LVS and Schematic Driven Layout workflows. Strong

UNIX/Linux command-line and scripting skills. Experience with

Git, SOS, or equivalent version-control systems used in EDA environments. 3.

Technical

Skills EDA Tools &

• Design Environment Cadence Virtuoso Analog/Mixed-Signal IC Design Flows Schematic &

• Layout Environment Schematic Driven Layout LVS EDA Automation Cadence SKILL SKILL Scripting CDF Parameters CDF Callbacks Schematic Automation Layout Automation Library Automation Simulation Automation OpenAccess &

• Programming OpenAccess (OA) Database API OA Schema C++ Python Tcl Shell Scripting PDK / CDK Foundry PDK Integration CDK Integration Parameterized Cells (pCells) Symbols &

• Device Models Layout Generators DRC/LVS Decks PDK Validation Simulation &

• Verification Cadence Spectre ADE OP / DC / AC / Transient / Noise Simulation PSF / Raw Simulation Data Analog Verification Flows Development Environment UNIX/Linux Git SOS / Version Control EDA Environment Configuration

📌 Senior EDA Engineer (Vasanth Nagar)
🏢 Best NanoTech
📍 Vasanth Nagar