Job Description

Analog Layout Engineer

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Location: Bengaluru

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Experience: 4–10 Years

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Role Overview

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We are looking for a hands-on Analog Layout Engineer with robust experience in advanced-node custom layout for analog/mixed-signal IPs. The role involves ownership of layout implementation, optimization, physical verification, and signoff for next-generation semiconductor designs.

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Key Responsibilities

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Execute custom analog/mixed-signal layout from schematic to signoff.
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Work on advanced nodes: 2nm, 3nm, 5nm, FinFET.
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Implement matching-critical layouts using common-centroid, interdigitation, symmetry, shielding, guard rings, and dummy structures.
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Optimize area, parasitics, matching, performance, and reliability.
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Drive DRC/LVS/ERC/PEX closure and resolve physical verification issues.
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Collaborate closely with Circuit Design, Physical Verification, CAD, and Technology teams.
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Support post-layout extraction and simulation and address layout-dependent performance issues.
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Core Technical Requirements

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4–10 years of hands-on Analog/Custom Layout experience.
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Strong expertise in advanced-node layout and FinFET technologies.
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Proficiency in Cadence Virtuoso or equivalent custom layout tools.
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Robust understanding of DRC, LVS, ERC, PEX, parasitic extraction, and signoff.
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Experience with complex analog/mixed-signal blocks.
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Solid understanding of device matching, layout-dependent effects, and advanced-node design rules.
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📌 Analog Layout Engineer Bengaluru
🏢 leadsoc technologies
📍 Bengaluru