IP Logic Design Lead (Bangalore Metropolitan Area)

IP Logic Design Lead (Bangalore Metropolitan Area)

01 Oct
|
Mulya Technologies
|
Bangalore Metropolitan Area

01 Oct

Mulya Technologies

Bangalore Metropolitan Area

Title: IP Logic Design Lead
Location: Bengaluru
About Company
We are a premium semiconductor design services company headquartered in Bangalore, India. We specialize in the development and delivery of complex Analog and Mixed-Signal IP solutions for leading semiconductor companies worldwide.
Our vision is to become the industry& most trusted partner for turnkey Analog IP development by combining deep technical expertise, execution excellence, and a customer-centric approach. We focus on solving some of the most challenging problems in semiconductor design, from IP migration and process-node portability to performance optimization, feature enhancements, and next-generation IP creation.
We expertise runs across multiple IP types such as:
High-Speed Serial IPs (SerDes, PCIe, Ethernet)
Memory and Parallel Interface IPs (DDR, LPDDR, HBM)
Die-to-Die and Chiplet Connectivity IPs (UCIe)
Infrastructure and Linear IPs (PLL, DLL, LDO, Voltage Regulators, GPIO, Clocking
Solutions)

Position Overview
We are seeking a highly motivated Analog Engineers to contribute to the




development and delivery of world-class Analog, Mixed-Signal, and Interface IP
solutions for leading semiconductor customers.
Key Responsibilities
 Lead the small Analog IP RTL design team.
 Implement the RTL Design from (A-specs) architectural specifications.
 Lead and execute IP RTL integration, IP level quality sign-off.
 Perform the basic quality checks such as functionality, lint, CDC, and synthesis checks.
 Define RTL design methodologies, coding standards, simulation flows, and debug
processes.
 Partner with Design Verification team to develop verification strategies and analyze failures.
 Support SoC integration activities, and resolve IP-level issues.
 Provide technical leadership across verification, physical design, and SoC teams to ensure
successful IP execution and delivery.
Minimum Qualifications
 Bachelor’s degree in Electrical Engineering with 8-10 years of RTL development experience.


📌 IP Logic Design Lead (Bangalore Metropolitan Area)
🏢 Mulya Technologies
📍 Bangalore Metropolitan Area

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