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Experience: 9+ yrs
Location: Hyderabad, Telangana, India
Job Type: Full time

We are looking for an experienced Senior Verification Lead to lead the verification of high-speed IPs and subsystems, with a strong focus on PCIe, SystemVerilog, UVM, and SoC verification methodologies.
The role combines deep technical expertise, verification strategy, team leadership, automation, and cross-functional collaboration. You will be responsible for driving high-quality IP and subsystem verification, establishing scalable methodologies, supporting silicon bring-up, and enabling multiple verification programs to execute efficiently and reliably.

Key Responsibilities
• Lead verification of high-speed IPs and subsystems, including PCIe-based designs, using SystemVerilog and UVM.
• Define verification strategies, methodologies, plans, schedules, milestones, and deliverables for IP and subsystem programs.




• Drive end-to-end verification execution from specification analysis through product qualification and silicon bring-up.
• Establish scalable, reusable, portable, and efficient verification environments and methodologies.
• Develop and implement automation solutions to improve verification productivity, coverage, quality, and execution efficiency.
• Collaborate closely with Architecture and Design teams to understand requirements and align verification flows and deliverables.
• Review architecture and design specifications and translate requirements into comprehensive verification strategies.
• Lead verification closure, including coverage analysis, regression management, defect tracking, and quality assessment.
• Drive verification of PCIe Root Complex, Endpoint, and SR-IOV functionality.
• Support verification involving industry-standard interfaces and architectures such as PCIe/NVMe, NAND, and AXI.
• Lead and support silicon bring-up activities and collaborate with hardware and

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