Analog Layout Engineer (Mumbai)

Analog Layout Engineer (Mumbai)

01 Oct
|
leadIC Design
|
Mumbai

01 Oct

leadIC Design

Mumbai

Location:

Bangalore / Hyderabad, India Experience:

4–10 Years Employment Type:

Full time Role Summary We are looking for an experienced

Analog Layout Engineer

to join our semiconductor design team and work on

high-performance analog and mixed-signal IPs

in advanced CMOS/FinFET technology nodes. The ideal candidate should have strong hands-on experience in

full-custom analog layout , preferably with

TSMC technology nodes , and a solid understanding of matching, parasitics, advanced layout techniques, and physical verification. The role involves working closely with analog circuit designers, physical verification, and other cross-functional teams to deliver high-quality, silicon-ready layouts. Key Responsibilities Develop

full-custom analog and mixed-signal layouts

for complex IC designs. Work on layout of analog building blocks such as: Op-Amps Bandgap references LDOs / Regulators ADC/DAC blocks PLL/DLL Charge Pumps Current/Voltage References High-speed I/O and SerDes/DDR PHY circuits Implement advanced layout techniques including:



Common-centroid Interdigitation Symmetry Matching Dummy devices Guard rings Shielding Sensitive-node isolation Perform

parasitic-aware layout optimization

and minimize the impact of routing and device parasitics on circuit performance. Work closely with analog designers to understand circuit requirements and translate schematics into optimized physical layouts. Perform

DRC, LVS, ERC and other physical verification checks

and debug layout issues. Support

PEX/post-layout simulation

and optimize layouts based on extracted parasitics. Ensure layouts meet requirements for

area, matching, noise, reliability, EM/IR and performance . Work with advanced

TSMC technology nodes , including FinFET-based processes. Collaborate with circuit design, verification, reliability, and physical design teams throughout the development cycle. Support IP integration, top-level layout, tapeout activities, and design documentation. Participate in

📌 Analog Layout Engineer (Mumbai)
🏢 leadIC Design
📍 Mumbai

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