Job Description
Senior Memory Design Engineer
nLocation: Bengaluru
nExperience: 5–10 Years
nJob Type: Full-time
nRole Overview
nWe are looking for a Senior Memory Design Engineer to drive circuit-level design and optimization of advanced memory macros. The role requires strong expertise in SRAM/Memory circuit design, custom transistor-level design, simulation, characterization, and PVT analysis .
nKey Responsibilities
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- Design and develop SRAM/Memory macros at transistor and circuit level.n
- Work on bitcell, sense amplifier, precharge, write driver, decoder, and peripheral circuits .n
- Perform schematic design, transistor sizing, simulations, and circuit optimization .n
- Analyze PVT, Monte Carlo, mismatch, variation, leakage, power, and performance .n
- Drive memory timing, power, stability, and reliability characterization.n
- Debug circuit-level issues and improve PPA and yield .n
- Collaborate with Layout, STA, Verification, and Silicon teams for memory macro development and signoff.n
- Support silicon correlation, characterization,



and post-silicon debug .n

nCore Technical Skills
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- Solid hands-on experience in SRAM / Memory circuit design .n
- Expertise in Cadence Virtuoso and transistor-level simulation.n
- Strong understanding of CMOS fundamentals, device physics, and circuit analysis .n
- Experience with SPICE simulations, PVT corners, Monte Carlo, and statistical analysis .n
- Knowledge of memory timing, stability, leakage, power, and yield optimization .n
- Exposure to advanced technology nodes and low-voltage memory design is a plus.n
- Strong scripting/debugging skills using Python/Perl/Tcl is desirable.n

nQualifications
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- B.E./B.Tech/M.E./M.Tech in Electrical/Electronics/VLSI or related discipline.n
- 5–10 years of relevant industry experience in Memory Design / Custom Circuit Design .n

nPreferred: Candidates with end-to-end ownership of memory macros from architecture → circuit design → simulation

📌 Senior Memory Design Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru