Hiring Location: Bangalore
Experience: 8-12 Years
We are seeking a

Staff DFT Engineer

who can

own and drive the complete DFT strategy for complex SoCs

from architecture through production silicon. This role requires deep hands-on expertise, solid technical judgment, and the ability to

lead and mentor junior engineers

while collaborating cross-functionally with design, PD, validation, and manufacturing teams.

The ideal candidate operates independently, makes architecture-level decisions, and is accountable for

test quality, coverage, and silicon readiness .

Responsibilities:

DFT Architecture & Planning

Own DFT architecture definition at chip and subsystem level
Define scan, compression, LBIST, MBIST, boundary scan, and test access strategies
Drive testability requirements early in the RTL design phase
Balance coverage, test time, power, area, and schedule tradeoffs

DFT Implementation (End-to-End Ownership)

Lead and execute:
Scan insertion, stitching, and DRC closure
ATPG (stuck-at, transition, path delay)
Test compression and pattern optimization




Own DFT signoff including coverage, IR drop, power, and timing impacts
Debug and resolve DFT issues across RTL, synthesis, P&R;, and gate-level stages

ATPG & Test Quality

Generate, analyze, and optimize ATPG patterns
Achieve high fault coverage with minimal pattern count
Review and sign off on:
Fault coverage reports
Pattern volume and test time
Diagnose coverage holes and drive design or methodology fixes

Silicon Bring-Up & Production Support

Support first silicon bring-up, failure analysis, and yield ramp
Debug scan, BIST, and tester-related failures
Collaborate with ATE and manufacturing teams to improve yield and test robustness
Drive ECOs for DFT-related silicon issues

Technical Leadership & Mentorship

Act as DFT technical lead for one or more chips
Guide and review work of junior and senior DFT engineers
Define best practices, checklists, and reusable DFT methodologies
Provide technical direction and

📌 DFT Engineer (Vasanth Nagar)
🏢 Capgemini Engineering
📍 Vasanth Nagar