Description
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Experience: 7+ yrs
Location: Hyderabad, Telangana, India
Job Type: Full time

We are looking for an experienced Senior Full-Chip Verification Engineer to contribute to the development and verification of next-generation NAND Flash Memory technologies. The role combines full-chip verification leadership, SystemVerilog/UVM-based verification, circuit simulation, cross-functional technical collaboration, and AI-assisted engineering.
The ideal candidate will have strong expertise in full-chip verification, verification planning, testbench development, SystemVerilog, and UVM, along with the ability to lead multidisciplinary teams and contribute to architectural and verification decisions.

Requirements
Key Responsibilities
- Contribute to the development of next-generation NAND Flash Memory through verification and optimisation of memory and logic circuits.
- Own and lead full-chip verification activities, including verification planning, execution, tracking, coverage,



and completion criteria.
- Develop comprehensive verification strategies aligned with product and architectural requirements.
- Design and maintain scalable SystemVerilog-based testbenches for full-chip verification.
- Implement verification environments using UVM and industry-standard verification methodologies.
- Evaluate key product features and collaborate with multidisciplinary teams to identify technical risks and recommend architectural decisions.
- Lead and coordinate verification activities across design, architecture, circuit, layout, and other engineering functions.
- Analyse verification results, identify failures and coverage gaps, and drive issues through resolution.
- Use circuit simulation tools such as XA, HSPICE, HSim, FineSim, or similar simulators as required.
- Define verification criteria, methodologies, schedules, milestones, and deliverables for full-chip projects.
- Tra

📌 Design Verification Engineer (Hyderabad)
🏢 Weekday AI
📍 Hyderabad