Senior Memory Layout Engineer Mumbai

Senior Memory Layout Engineer Mumbai

01 Oct
|
SmartSoC Solutions
|
Mumbai

01 Oct

SmartSoC Solutions

Mumbai

Minimum 4+ years of experience with a Bachelor's degree in Engineering studies or Master's degree, robust layout knowledge.

Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules).

Robust layout knowledge in advanced submicron FinFET processes, including TSMC 5nm, 3nm, 2nm, A14 or Samsung lower FinFET nodes.

📌 Senior Memory Layout Engineer Mumbai
🏢 SmartSoC Solutions
📍 Mumbai

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