About the Role

nTiming Closure Leadership: Deliver sign-off quality STA across complex, high-frequency designs, ensuring robust performance in diverse modes and corners.

nResponsibilities

n

n

n
Timing Closure Leadership: Deliver sign-off quality STA across complex, high-frequency designs, ensuring robust performance in diverse modes and corners.
n
Customer Impact: Translate technical excellence into measurable outcomes for customers — faster turnaround, improved QoR, and optimized PPA trade-offs.
n
Constraint Development: Architect and validate timing constraints to guarantee design reliability and seamless integration into customer workflows.
n
Synthesis & Optimization: Own synthesis flows using Fusion Compiler and Design Compiler, achieving customer-defined targets for timing, area, and power.
n




Cross-functional Collaboration: Partner with RTL, PD, and DFT teams to proactively resolve design challenges, ensuring smooth delivery for customer programs.
n
AI-driven Design: Apply reinforcement learning tools (DSO.ai) to accelerate design space exploration, delivering cutting-edge solutions that reduce cycle time.
n
Low Power & UPF: Implement and verify UPF-based power intent, ensuring energy-effective designs aligned with customer requirements.
n
Formal Equivalence & ECOs: Guarantee functional correctness through formal verification and ECO generation, enabling reliable customer tape-outs.
n

n

n

📌 Sta Engineer Bengaluru
🏢 SmartSoC Solutions
📍 Bengaluru