02 Oct
|
Acesoft Labs
|
Hyderabad
02 Oct
Acesoft Labs
Hyderabad
We are hiring DFT Engineer | Hyderabad
Notice Period: 30 Days
Position: DFT Engineer
Looking for passionate professionals with 4 to 6 years of experience in Design for Test (DFT) to join our growing team in Hyderabad!
Key Responsibilities:
- Drive innovative DFT implementation at RTL and Gate level for SoC designs at both hard macro and chip top level, including:
Scan insertion
MBIST (Memory BIST)
LBIST (Logic BIST)
Boundary Scan
- Generate and validate ATPG patterns through simulation
- DFT verification using RTL and Gate-level simulations
- Collaborate with cross-functional teams across:
Static Timing Analysis (STA)
Synthesis
Logic Equivalence Check (LEC)
CLP
Functional Verification & Validation
Tool Proficiency:
- Experience with DFT tools from:
Siemens
Synopsys
Cadence
Technical Skills:
- Solid coding skills in:
Verilog, VHDL
C/C++
TCL, Perl, Python
📌 DFT Engineer (Hyderabad)
🏢 Acesoft Labs
📍 Hyderabad