02 Oct
|
Acesoft Labs
|
Hyderabad
02 Oct
Acesoft Labs
Hyderabad
Semiconductor STA Design Engineer
Desired experience 3-10 Years
TSMC Certification Yes/No
Role
You will be responsible for analyzing digital and analog circuits used in the development of memory products.
Responsibilities
- Doing STD cells characterization work (max up to 40% of time), Static timing analysis (60%)
- Writing constraints, analyzing the STA reports
- Performing verification processes with modeling and simulation using industry standard simulators
- Able to characterize basic STD Cells
- Writing ARC for STD cell char (using primeLib, Silicon smart)
- QA check
- Circuit understanding block wise, Full chip level
- Static timing Analysis of DRAM block wise, top level analysis, cell level analysis
****Preferred candidate profile ***
Immediate joiners can send CV to
Follow/connect me on linkedln: https://www.linkedin.com/in/aman-b056091b1/
📌 Semiconductor (STA) Design Engineer (Hyderabad)
🏢 Acesoft Labs
📍 Hyderabad