We are looking for an experienced SRAM Memory Compiler & Memview Engineer with strong expertise in memory compiler flows, Memview generation, and SRAM/Memory IP.
Key Responsibilities & Skills
- Hands-on experience in AMD Memview generation.
- Solid experience in creating and working with Memview servers.
- Knowledge of N2/N3 Memory Compiler flows will be an added advantage.
- Good understanding of TSMC SRAM features and SRAM generation based on required configurations.
- Strong knowledge of SRAM views generated/supported by Memory Compilers, including:
- Physical views
- Timing views
- Logical views
- Other relevant memory views
- Understanding of P4 and related memory/compiler flows.
- Experience with SRAM/Memory IP, Memory Compiler, and Memory View Generation is highly preferred.
Candidate Profile
- 35 years of relevant experience in SRAM/Memory IP or Memory Compiler domain.
- Strong understanding of memory compiler and memory view generation flows.
- Candidates with hands-on Memview generation experience are preferred.