EON SPACE LABS FPGA VERIFICATION INTERNSensor Readout & Data Processing
LOCATION
Hyderabad, India
EMPLOYMENT
Internship
EXPERIENCE
0–1 year
DOMAIN
FPGA • Space Electronics • Imaging
EON Space Labs is looking for a motivated FPGA Verification Intern to work on robust FPGA-based sensor readout and data-processing RTL for next-generation space systems. The intern will work closely with FPGA design engineers to develop verification environments, create comprehensive test cases, debug RTL, and ensure high-quality, reliable designs for real-world space applications.
Roles & Responsibilities
- Develop and maintain verification environments for FPGA RTL.
- Create directed and constrained-random test cases for functional and robustness verification.
- Develop SystemVerilog testbenches with monitors, scoreboards, checkers, and verification components.
- Verify sensor readout logic, data-processing pipelines, and memory interfaces.
- Perform corner-case, robustness, and error-condition testing.
- Debug simulation failures and analyze RTL waveforms to identify design issues.
- Verify Clock Domain Crossing (CDC), asynchronous FIFOs, reset-domain behavior, and data buffering.
- Verify AXI, AXI4-Stream, AXI4-Lite, APB, AHB, UART, SPI, I2C, and custom sensor interfaces.
- Assist with FPGA hardware validation and ILA/VIO-based debugging.
- Perform FPGA simulation and on-board validation.
- Document test plans, verification results, coverage, issues, and verification reports.
- Collaborate with FPGA design engineers to reproduce, debug, and resolve RTL issues.
Key Technical Areas
· FPGA RTL Verification
· FPGA Simulation, Hardware Validation & ILA Debugging
· CDC, Reset-Domain Verification & Asynchronous FIFOs
· Data Integrity,
Error Handling & Memory Interfaces
Required Technical Skills
· Solid fundamentals in digital design and FPGA architecture.
· Proficiency in SystemVerilog/Verilog.
· Understanding of testbench development and FPGA verification concepts.
· Knowledge of FIFOs, FSMs, memory interfaces, and CDC.
· Understanding of AXI, APB, and AHB protocols.
· SystemVerilog Assertions (SVA).
· Familiarity with Vivado and simulation tools such as XSIM, ModelSim, or Verilator.
· Good debugging, problem-solving, and analytical skills.
Preferred Skills — Good to Have· Cocotb experience.
· Python for verification and automation.
· FPGA hardware debugging using ILA/VIO.
· Formal verification knowledge.
Eligibility
- B.Tech / B.E. in ECE
- Final-year students or recent graduates are welcome to apply.
- Strong academic fundamentals with relevant academic, personal, or project experience.
What You Will Gain
- Hands-on experience in real-world FPGA verification.
- Exposure to space-bound sensor readout and data-processing systems.
- Practical experience with industry-standard verification methodologies.
- Experience in FPGA simulation, hardware validation, and debugging.
- Opportunity to work closely with experienced FPGA design engineers.
- Potential opportunity for full-time employment based on performance and organizational requirements.
Selection Process
1
Technical Screening
Digital design, SystemVerilog, and verification fundamentals
2
Practical Verification Assessment
RTL, testbench development, and debugging
3
Technical Interview
Design, verification, CDC, and protocols
4
Team / HR Discussion
Role fit and final discussion
How to Apply
Send your resume to
[email protected]
📌 FPGA VERIFICATION INTERN (Hyderabad)
🏢 Eon Space Labs
📍 Hyderabad