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Are you passionate about FPGA, ASIC Design, RTL Development, and Digital Design? This is your opportunity to work on cutting-edge technologies and contribute to next-generation semiconductor and AI-driven hardware solutions.

Spanidea Inc is looking for talented FPGA / ASIC Design Engineers with 2–5 years of experience to join our growing engineering team.

?Location: Chennai

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✅ RTL Design using Verilog/SystemVerilog

✅ FPGA/ASIC Design & Verification

✅ Timing Analysis & FPGA Implementation

✅ Vivado / Quartus Prime Experience

✅ Digital Design Fundamentals (FSM, CDC, Timing Closure)

✅ Knowledge of PCIe, DDR, SPI, UART, I²C, Ethernet, AXI/AHB/APB Protocols

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✔ Work on next-generation Semiconductor & AI Hardware projects

✔ Collaborative engineering culture

✔ Exposure to cutting-edge FPGA technologies

✔ Growth opportunities and continuous learning opportunities

? Interested candidates can walk in directly or share their resumes at:

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Know someone who would be a great fit? Tag them in the comments or share this post with your network!

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📌 FPGA And ASIC Design Engineer (Chennai Metropolitan Area)
🏢 SpanIdea Systems
📍 Chennai Metropolitan Area