Field-Programmable Gate Arrays Engineer (Hyderabad)

Field-Programmable Gate Arrays Engineer (Hyderabad)

02 Oct
|
Naadyx Solutions
|
Hyderabad

02 Oct

Naadyx Solutions

Hyderabad

Naadyx Solutions Pvt. Ltd. | Hyderabad (Gachibowli) | Full-time

Naadyx Solutions is an Indian deep-tech defence electronics company building tactical software-defined radios, counter-UAS systems and secure communication products for the Indian armed forces. We are looking for an FPGA engineer who can take a waveform from algorithm to working hardware.

What you'll do

- Design and implement single-carrier and multi-carrier (OFDM) waveforms on FPGA
- Build complete TX and RX baseband chains, from bits to RF interface and back
- Convert MATLAB/Python floating-point models into fixed-point, synthesizable RTL
- Integrate DSP blocks with RF transceivers (AD9361/AD9364 or similar) and ARM processors on Zynq/MPSoC platforms
- Verify designs in simulation and on hardware, and close timing on production builds

Must have

- 3+ years of FPGA development in Verilog/VHDL for DSP or communication systems
- Hands-on experience implementing QPSK modulation and demodulation on FPGA
- Proven experience designing single-carrier and multi-carrier waveforms
- Strong grasp of fixed-point arithmetic, bit-width analysis and resource/latency trade-offs

Transmit chain skills

- Scrambling, CRC, FEC encoding (convolutional, LDPC or Turbo) and interleaving




- Symbol mapping (BPSK/QPSK/QAM), preamble and pilot insertion
- Pulse shaping (RRC), interpolation, CIC/FIR filters, NCO and digital up-conversion
- OFDM: IFFT, cyclic prefix insertion, windowing, PAPR awareness

Receive chain skills

- Digital down-conversion, decimation, AGC and DC offset correction
- Packet detection and frame synchronization (correlation, Schmidl-Cox)
- Timing recovery (Gardner, Mueller-Müller, polyphase filter banks)
- Carrier frequency and phase recovery (Costas loop, PLL, CFO estimation)
- Channel estimation and equalization (LMS, ZF, MMSE)
- OFDM: FFT, CP removal, pilot-based tracking
- FEC decoding (Viterbi, LDPC), de-interleaving, descrambling

Tools

- Xilinx Vivado, Vitis HLS; AXI4 / AXI-Stream interfaces
- MATLAB/Simulink (HDL Coder a plus), Python/NumPy
- ModelSim/QuestaSim, ILA/ChipScope for on-hardware debug

Positive to have

- Frequency hopping, spread spectrum waveforms
- MIMO, MANET or tactical radio experience
- RFSoC, GNU Radio or embedded Linux exposure

Eligibility

- B.Tech/M.Tech in ECE, EE or related field
- Indian citizen (defence programmes)

📌 Field-Programmable Gate Arrays Engineer (Hyderabad)
🏢 Naadyx Solutions
📍 Hyderabad

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