02 Oct
|
Texas Instruments
|
Bengaluru
02 Oct
Texas Instruments
Bengaluru
Some engineers build circuits. Others architect the systems those circuits live inside. At Texas Instruments, we're looking for the rare mind that can hold the entire blueprint in their head — from market requirement to silicon reality — and make every design decision matter. If that sounds like you, your next chapter starts here.
? About the Role
Texas Instruments is seeking a Senior SoC System Architect to join our semiconductor R&D; organization — one of the most technically demanding and rewarding environments in the global chip industry.
As an Architect at TI, you won't just review designs — you'll define them. You'll establish the high-level frameworks, system-level specifications, and design methodologies that shape how digital electronic devices and integrated circuits come to life. From the earliest concept stage through mass production, your architectural decisions will leave a fingerprint on products shipped to industries worldwide.
You'll collaborate with designers, system engineers,
and cross-functional R&D; teams — translating market requirements and product visions into concrete, implementable architectural solutions. If you thrive at the intersection of hardware, software, strategy, and silicon — this is your role.
?️ Key Responsibilities
• Define high-level architectural frameworks and system-level specifications for digital devices and ICs
• Develop system partitioning strategies and interface specifications that guide the full product development lifecycle
• Conduct rigorous architectural trade-off analyses balancing performance, power, area, and cost (PPAC)
• Perform system-level modeling and simulation using estimation tools (simulators, Python, MATLAB, spreadsheets)
• Translate market-level requirements into hardware and/or software features with transparent cost, power, security, and safety implications
• Evaluate end-to-end solutions and derive actionable system requirements from high-level inputs
• Perform "what-if" analyses to ensure IP/SoC d
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