Dft Lead Engineer (Karnataka)

Dft Lead Engineer (Karnataka)

02 Oct
|
BITSILICA
|
Karnataka

02 Oct

BITSILICA

Karnataka

8 to 10 yrs of experience in DFT architecture, scan Insertion, compression at core level and So C level. Experience in ATPG pattern generation, coverage analysis Experience with timing and no-timing simulations Experience in Memory-BIST Have understanding of SSN architecture, clock architecture, OCC

📌 Dft Lead Engineer (Karnataka)
🏢 BITSILICA
📍 Karnataka

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