Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You are someone who has spent the last couple of years getting your hands dirty with embedded memory design and you are ready to go deeper. You have worked with SRAM, ROM, or Register Files enough to know that the details matter, that a small circuit decision ripples through characterization, layout, and eventually into silicon. You are not looking for surface-level work. You want to understand why a bitcell behaves the way it does,
how reliability analysis connects to real-world performance, and what makes one memory architecture better than another.
You learn by doing and by asking the right questions. When something does not make sense in simulation results, you dig in. When a senior engineer explains a tradeoff, you follow the logic and remember it for next time. You are comfortable working in Cadence tools, writing scripts when repetitive tasks slow you down, and collaborating across teams that speak different technical languages. You are organized enough to juggle multiple design tasks and curious enough to want to know how your piece fits into the bigger chip. At Synopsys, you will work on memory IP that goes into real products, alongside engineers who will help you grow.
What You'll Be Doing
• Design and simulate embedded memory circuits including SRAM, ROM, and Register Files using Cadence Virtuoso and related tools
• Support layout activities by worki
📌 R&D Engineering, Sr Engineer (Noida)
🏢 Synopsys
📍 Noida
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