Lead / Staff/Sr. Staff Physical Design Engineer (Bengaluru)

Lead / Staff/Sr. Staff Physical Design Engineer (Bengaluru)

03 Oct
|
Sykatiya Technologies
|
Bengaluru

03 Oct

Sykatiya Technologies

Bengaluru

Description: Lead / Staff/Sr. Staff Physical Design EngineerExperience: 10+ Years Location: Bangalore
About the RoleWe are looking for a high-performing Techno-Functional Lead / Staff/Sr.Staff Physical Design Engineer with 10+ years of experience in leading complex, multi-million gate ASIC/SoC physical design projects. In this hybrid role, you will act as a primary technical authority on physical implementation while simultaneously steering execution strategy, resource allocation, risk mitigation, and stakeholder engagement. You will bridge the gap between technical execution and business delivery, ensuring complex chips tape out on time with optimal Power, Performance, and Area (PPA).
Responsibilities Technical Leadership• RTL-to-GDSII Execution: Directly own and participate in the full physical design flow including floorplanning,
power grid design, placement, CTS (Clock Tree Synthesis), routing, signal integrity (IR drop / EM), STA (Static Timing Analysis), and physical verification (DRC/LVS).
• SoC-Level Physical Design:



Own physical implementation and closure activities for complex SoC designs, including integration of high-speed and complex IP blocks.
• SerDes IP Integration & Implementation: Work hands-on with SerDes IPs at the SoC level, including physical integration, floorplan considerations, timing, congestion, signal integrity, routing, and implementation-related issue resolution.

• Timing & PPA Closure: Drive setup/hold timing closure, congestion optimization, signal integrity analysis, and Power, Performance, and Area (PPA) optimization.
• Architecture & Methodology: Define physical implementation methodologies and custom automation scripts (Tcl/Python) tailored for ultra-low power and high-speed design constraints.
• Advanced Technology Nodes: Drive design closure on sub-7nm process nodes (e.g., 5nm, 3nm, 2nm) dealing with multi-patterning, high-density cell placement, complex power domain management (UPF/CPF), and thermal considerations.
• Cross-Fun

📌 Lead / Staff/Sr. Staff Physical Design Engineer (Bengaluru)
🏢 Sykatiya Technologies
📍 Bengaluru

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