Job Title• Director of Digital Design Engineering, Memory Interface IP
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years deep in the world of high-speed memory interfaces, where timing closure is measured in picoseconds and a single protocol violation can sink a tape-out. You know HBM, DDR, and LPDDR not as acronyms but as living systems with tradeoffs you have navigated across multiple generations. Leading a design team is not about holding status meetings. It is about knowing when to step into a critical path issue at 4 p.m. on a Friday and when to let your engineers own the solution.
You have built teams that ship, and you know the difference between a group that executes and one that just stays busy.
You do not manage from a distance. You review RTL, you ask the hard questions during design reviews, and you push back when a verification plan is too thin or a schedule is built on hope. At the same time, you trust your people, you explicit obstacles, and you create space for them to do their best work. You have worked with executive stakeholders and you can translate a technical risk into a business decision without losing the engineering substance. At Synopsys, you will lead a team building memory interface IP that powers the next wave of AI and high-performance compute.
What You'll Be Doing
• Lead a team of ASIC digital design and verification engineers working on HBM, DDR, and LPDDR memory interface IP
• Own the technical direction and execution of RTL design and verification at both block and chi
📌 Director of Digital Design Engineering, Memory Interface IP (Hyderabad)
🏢 Synopsys
📍 Hyderabad
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