• 3+ years of experience in analog design, analog validation, or digital verification.
• Hands-on experience with simulation and debugging.
• Knowledge of SystemVerilog or UVM is a plus.
• Understanding of analog circuits or mixed-signal concepts preferred.
• Basic scripting skills preferred.AMS verification flows and simulation environments.
• Mixed-signal test case development and execution.
• Simulation debug and failure analysis.
• Regression execution and documentation.
• Collaboration with analog and digital design teams.D15
📌 AMS Verification Engineer (Hyderabad)
🏢 Source right
📍 Hyderabad
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