We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years in verification trenches where the difference between a clean signoff and a late-stage respin comes down to the testbench you built three months ago. You know that coverage numbers mean nothing if the corner cases are still hiding, and you are the engineer who finds them before tapeout. You think in layers: block-level behavior, subsystem integration, protocol compliance, and the edge cases that only show up when three things go wrong at once.
Working in UVM is second nature to you. You do not just write tests,
you build environments that catch real bugs and make the next verification cycle faster. Debugging is not a chore for you, it is a puzzle you actually enjoy solving, whether that means tracing through waveforms at 2am or writing a Python script to parse regression logs and surface the pattern everyone else missed.
You have worked on real IP, the kind that ships in millions of devices, and you understand what it takes to get from "mostly works" to "ready for customer integration." At Synopsys, you will verify DesignWare IP that powers everything from mobile processors to data center silicon, and the quality bar you hold will matter.
What You'll Be Doing
• Verify IP blocks and subsystems across DesignWare product lines, developing and executing verification plans, test scenarios, checkers, assertions, and functional coverage models for your assigned areas
• Build and enhance UVM-based verification environments that support block-level and subsys