Design Lead

Bengaluru, Karnataka

Job Summary

High speed interface signal integrity experience using high speed interface is mandatory

5-7years of SI analysis experience.

Key Responsibilities

Responsible for Electrical and Signal Integrity aspects of the hardware platform and package requirements for SOC products. The position includes working across areas of platform, software/BIOS, SOC H/W and Package architecture teams, with emphasis in the domain of platform and package signal Integrity. This includes defining platform form-factors, optimizing SOC package ball maps,



driving platform device placement / floor planning with focus on shrinking PCB real estate.Should be capable of identifying and extracting the key features and dynamics which have the largest impacts to the overall platform electrical risk within the platform hardware and overall system.

Skill Requirements

Positive knowledge of signal integrity aspects of parallel buses such as LPDDR5x 8533MT/s memory down, DDR5 8000MT/s memory down/DDIMM/MRDIMM and High Speed Serial IOs such as PCIe Gen6/UCIe/112G Ethernet/SERDES interfaces would be mandatory.Solid electrical/electromagnetic fundamentals with 5+ years of relevant experience in the SI domainGood system/board design knowledge and process awarenessFamiliarity with Power Integrity fundamentals.

Positive knowledge in 3D/2D EM simulation tools like HFSS/ADS/HSpice/Power DC/Power SI.

Other Requirements

Excellent communication skills

📌 Design Lead Bengaluru (India)
🏢 HCLTech
📍 India