CScale is a startup backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.
CScale is developing next-generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale-up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber-optic technologies that overcome the limitations of existing optics solutions and architectures.
SoC Verification – MTS SoC DV Engineer
Experience: 8–10 Years
Role Summary
This role serves as the hands-on technical lead for SoC Verifications. The position drives testbench architecture, scalable and reusable verification strategies, testbench development, verification sign-off, documentation, and team mentoring. Key responsibilities include functional and data path verification.
The role ensures comprehensive verification sign-off and delivers a robust, high-quality, and reusable verification environment aligned with project objectives.
Key Responsibilities
• Define and drive verification strategy across sub-system and SoC-level domains.
• Develop verification setting from the scratch for complex SoC leveraging both C-based and UVM methodologies
• Develop and manage comprehensive test plans and coverage models.
• Collaborate with design teams to define system boot, reset sequence, and design configuration for various use-cases.
• Collaborate with design team to define debug architecture and debug/trace verification.
• Manage project milestones, deliverables, schedules, and cross-functional dependencies.
• Lead waveform and code review with team members and own technical documentation.
• Mentor and grow teams of DV engineers, including external contractors.