Design Verification Engineer :

Experience : 5 - 8 Years

Location : Bangalore / Kochi / Chennai / Pune

Job Type : Full-time

About the Role :

We are looking for a skilled Design Verification Engineer with hands-on experience in live semiconductor/SoC verification projects. The ideal candidate should have strong expertise in SystemVerilog and UVM, functional verification methodologies, protocol verification, and debugging.

Key Responsibilities :

- Develop and maintain functional verification environments using SystemVerilog and UVM.
- Build and enhance verification components including monitors, checkers, scoreboards, drivers, sequences, and assertions.
- Develop constrained-random stimulus and functional coverage models to achieve verification goals.
- Work extensively with AMBA bus protocols and ARM-based CPU architectures.
- Contribute to verification of PCI Express and/or Ethernet protocols, where applicable.
- Debug RTL, simulation, and verification environment issues and identify root causes.
- Collaborate with RTL, architecture, design, and system teams to resolve functional issues.
- Develop scripts using Python, Perl, Shell, or Makefile to automate verification workflows.
- Participate in regression analysis, coverage closure,



and bug tracking.
- Maintain verification documentation, dashboards, and project-level reports.

Required Skills :

- 5 - 8 years of hands-on experience in Design Verification.
- Strong knowledge of SystemVerilog and UVM with practical live-project experience.
- Good understanding of AMBA protocols such as AXI/AHB/APB.
- Experience with ARM CPU architecture/verification.
- Knowledge of PCIe and/or Ethernet protocols is desirable.
- Experience developing verification environments, monitors, scoreboards, checkers, assertions, and coverage models.
- Good understanding of constrained-random verification and functional coverage.
- Proficiency in Unix/Linux environments.
- Familiarity with configuration management, bug tracking, and verification dashboarding tools.
- Strong debugging and problem-solving skills.
- Working knowledge of Python/Perl/Shell/Makefile scripting.

Preferred Skills :

- Experience with complex SoC/IP verification.
- Exposure to coverage-driven verification and regression automation.
- Experience with industry-standard simulation and verification tools.
- Robust communication and collaborative skills

📌 Design Verification Engineer - System Verilog (India)
🏢 Neurealm
📍 India