03 Oct
|
Mirafra
|
Hyderabad
Familiarity with SoCs and boot flow would be practical.
SV UVM based TB setting setup, usage of UVM VIPs.
Developing UVM sequences, tests, TB bring up and sanity regressions.
Familiarity with Software development flow including assembly and C is beneficial.
Knowledge of system-level architecture including buses like AXI/CHI/ACE5, bridges, memory controllers such as DDR5/LPDDR5/DDR4/LPDDR4
Knowledge of one or more protocols; PCIe, USB, Ethernet
Sound knowledge on UPF and power domain crossing
Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi
Strong expertise in DFT-DV verification, like Scan clear / Mem explicit / JTAG / IJTAG / Memory repair, Scan dump, ATPG etc
Experience (years) : 10+ years
Education Qualification
BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent
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📌 Design Verification Lead Hyderabad
🏢 Mirafra
📍 Hyderabad