Custom Analog Vijayawada

Custom Analog Vijayawada

03 Oct
|
Qailash Labs
|
Vijayawada

03 Oct

Qailash Labs

Vijayawada

Role Level: Core Engineering (Custom Analog Layout Engineer / Senior Layout Specialist)
• Location: Vijayawada (AP) / Hybrid (Open to relocation or versatile hybrid for experienced analog layout specialists)
• Experience: 3 to 6 years of direct, hands-on experience in Full-Custom AMS IC Silicon Layout with proven commercial tape-out closure

CRITICAL APPLICANT SCREENING NOTICE (PLEASE READ CAREFULLY):
• Strictly Full-Custom Analog IC Silicon Layout: This position is 100% dedicated to manual, transistor-level custom analog IC silicon layout in Cadence Virtuoso Layout-XL. It requires deep expertise in silicon design rules, analog matching, noise shielding, and parasitic extraction.
• Automated Digital Place & Route (APR / P&R;) Applicants: Candidates whose background is primarily in automated digital physical design (Synopsys ICC2, Cadence Innovus, digital standard cell P&R; flows) are NOT suitable for this role. Please do not apply.
• Batch Digital Physical Verification (PV) Batch Runners:



Candidates whose experience is limited to executing automated DRC/LVS runscripts or fixing antenna/density violations on large digital SoCs without hands-on analog polygon layout and device matching will NOT be shortlisted.
• PCB / Board-Level Hardware Designers: Candidates with Printed Circuit Board layout (Altium, Allegro PCB, Gerber generation, SMT assembly) experience are INELIGIBLE. This is an advanced integrated circuit (monolithic silicon microchip) physical layout position.

Role Overview:
Own the transistor-level custom physical layout, critical analog matching, floorplanning, parasitic extraction (PEX), and DRC/LVS physical verification sign-off for sovereign Cryogenic Infrared Readout ICs (Cryo-ROICs) and precision mixed-signal ASICs on advanced deep-submicron CMOS and up-to-date SOI process nodes. Working in tight collaboration with our Analog Circuit Designers, you will translate sensitive, micro-pitch analog schematics into tape-out-ready, DRC/LVS clean silicon layouts with

📌 Custom Analog Vijayawada
🏢 Qailash Labs
📍 Vijayawada

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