The Validation Lead is responsible for driving end-to-end validation strategy across semiconductor chip programs at LTSCT, covering both pre-silicon testability planning and post-silicon functional validation. With 15+ years of experience, the role ensures chips meet design specifications by influencing architecture for testability, preparing robust validation settings, executing comprehensive test plans, and leading defect analysis. This position requires a solid blend of hardware, firmware, and software expertise, along with leadership in cross-functional collaboration to ensure chips are ready for engineering samples and customer deployment.

SECTION III: KEY RESPONSIBILITIES/ ACCOUNTABILITIES
Pre-Silicon Testability
Partner with architecture and design teams to embed testability hooks into chip designs.
Influence board design specifications to ensure validation of readiness before tape-out.
Drive validation planning early in the design cycle to minimize downstream risks.

Validation Workplace Preparation
Lead the development of test boards, interfaces,



and supporting settings.
Ensure firmware/software integration for validation platforms.
Oversee creation of test cases aligned with architectural specifications.

Post Silicon Test Validation
Direct execution of functional validation across all chip components and features.
Validate real hardware running firmware/software against design specifications.
Ensure comprehensive coverage of system-level scenarios and corner cases

Defect Identification & Debugging
Lead defect triage, documentation, and communication with design teams.
Drive root cause analysis and corrective validation cycles.
Provide go/no-go recommendations for engineering sample release.
Leadership & Strategy
Mentor validation engineers and build high-performing teams.
Define validation methodologies, best practices, and automation strategies.
Represent validation in cross-functional program reviews and cu

📌 Validation Lead Bengaluru
🏢 LT-Larsen & Toubro
📍 Bengaluru