The Tenstorrent team combines technologists from different disciplines who come together with a shared passion for AI and a deep desire to build excellent products. We value collaboration, curiosity, and a commitment to solving hard problems.
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CPU verification engineer driving core level regression debug, triage and responsible for the functional sign-off for the core.
• Functional verification with emphasis on core level regression debug and triage for simulation and emulation regressions
• Hands-on debug for core level failures. Propose and implement stimulus enhancements and debug capability improvements for core, cluster and chip level testbench environments
• Primary owner for driving bug hunting using all available stimulus generators. Analysis of bugs found and proposing not only stimulus but also configuration and coverage changes
• Drive core level regression environment enhancements to improve the overall productivity for the team
• Develop detailed core level verification plans by understanding both ISA and microarchitectural specifications for the design
• Support design deployment across simulation and emulation platforms
• Develop random and directed stimulus that spans pre-silicon, emulation and post-silicon domain
• Work with design, test and post silicon validation teams to ensure high quality delivery of the entire CPU core / cluster
• BS/MS/PhD in EE/ECE/CE/CS with at least 7+ years of experience
• Strong background and experience with high performance OOO CPU microarchitecture
• Experience and understanding of one or more ISAs - x86, ARM or RISCV
• Significant experience debugging RTL and DV in a simulation environment, proficient at waveform and log file based debug
• Experienced with assembly, C/C++ and UVM based stimulus generation targeting both ISA and microarchitectural scenarios
• Familiar with simulation, formal and emulation environments
• Hands-on with scripting (Python, PERL)
• Experience with hardware de
📌 CPU Core Regression Debug Engineer (India)
🏢 Tenstorrent
📍 India
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