PQAngels Technologies is looking for experienced RTL Design Engineers to join our semiconductor/VLSI engineering team.
We are looking for candidates with strong hands-on experience in RTL development, Verilog/SystemVerilog, SoC/Subsystem design, NoC, and ASIC design flows.
What You Will Work On
- Design and develop synthesizable RTL using Verilog/SystemVerilog.
- Convert microarchitecture specifications into RTL implementations.
- Own block-level RTL design, development, and debugging.
- Work on SoC/Subsystem and NoC-based designs.
- Perform RTL quality checks, including Lint and CDC.
- Support synthesis and resolve synthesis-related issues.
- Collaborate with DV, Physical Design, and SoC Integration teams.
- Analyze and optimize designs for Performance, Power, and Area (PPA).
- Participate in design reviews and technical discussions.
- Support customer-facing technical discussions when required.
Requirements
Key Skills
Must Have:
- Verilog
- SystemVerilog
- RTL Design
- Microarchitecture
- ASIC/VLSI Design Flow
- Synthesis
- Lint & CDC
- RTL Debugging
Good to Have:
- NoC / Subsystem
- CPU / GPU architecture
- DDR
- PCIe
- USB
- Ethernet
- TCL / Python / Perl scripting
Tools
- Synopsys Design Compiler
- SpyGlass
- VC SpyGlass
Benefits
Why PQAngels?
- Work on advanced Semiconductor / ASIC / VLSI projects
- Exposure to IP, Subsystem and SoC verification
- Opportunity to work with experienced semiconductor engineers
- Exposure to global projects and customers
- Solid technical learning and career-growth opportunities