? HIRING | DFT ENGINEER | BANGALORE ?
? Experience: 5+ Years
? Location: Bangalore
⚡ Preference: Immediate Joiners / Serving Notice Period
We are looking for a DFT Engineer with strong hands-on experience in DFT architecture, implementation & signoff for complex ASIC/SoC designs.
? Key Skills:
• DFT architecture, insertion & signoff – Full Chip / PHY / 3rd-Party IP
• Scan Chain Insertion & Compression – Siemens Tessent
• ASA PHY DFT Integration & ASA IP DFT Ports
• BIST / PCS-PMA Bus Isolation
• MBIST for SRAMs/FIFOs
• ATPG pattern generation & fault simulation
• IEEE 1149.1 JTAG / Boundary Scan
• Multi-clock scan architecture
• Siemens Tessent / Synopsys DFT Compiler
• Automotive DFT / AEC-Q100 experience is a plus
? If you're a DFT skilled looking for your next opportunity in Bangalore, let's connect
? Interested? share your updated CV at [email protected] share this opportunity with someone who may be a great fit.
Hiring #DFT #DFTEngineer #VLSI #Semiconductor #ASIC #SoC #Tessent #DFTCompiler #MBIST #ATPG #JTAG #BoundaryScan #Automotive #AECQ100 #BangaloreJobs #ImmediateJoiner #NoticePeriod

📌 DFT Engineer (Bengaluru)
🏢 RTLYNX SEMICON
📍 Bengaluru