ASIC Digital Design (Hyderabad)

ASIC Digital Design (Hyderabad)

06 Oct
|
Synopsys
|
Hyderabad

06 Oct

Synopsys

Hyderabad

Descriptions & Requirements

Job Description and Requirements

We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are
You have spent years verifying IP that has to work in silicon, not just pass regression. The difference between a clean tape-out and a respin often comes down to the corner case you caught at 2 AM in a Verdi waveform, and you are the engineer who finds it before it becomes a silicon bug. You read protocol specs the way some people read novels. UFS, UniPro, MIPI M-PHY are not just acronyms to you, they are systems you understand at the transaction level, the state machine level, and the timing level. You know where the edge cases hide.




Building a UVM workplace from scratch does not intimidate you. Neither does inheriting someone else's testbench and making it better. You write sequences that stress the design in ways the spec did not explicitly call out because you have learned that is where the bugs live. Coverage closure is not a checkbox exercise for you, it is a conversation with the design about what actually matters.
You do not need someone to tell you what to verify next. You read the spec, talk to the designer, look at the waveform, and figure it out. At Synopsys, you will work on high-speed interconnect IP that powers real products, and what you verify will ship.
What You'll Be Doing
• Own end-to-end verification for MphyV6, UFS, and UniPro IP blocks, from test planning through coverage closure and sign-off
• Build and extend UVM testbenches in SystemVerilog, including agents, sequences, scoreboards, coverage models, and protocol checkers
• Write constrained-ran

📌 ASIC Digital Design (Hyderabad)
🏢 Synopsys
📍 Hyderabad

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