Job Summary

We are seeking a highly capable RTL Verification Lead to own and drive unit-level and subsystem-level verification of complex SoCs. The role involves verifying AI accelerators, Network-on-Chip (NoC) fabrics, AXI-based interconnects, and low-power designs, with end-to-end ownership from verification planning through sign-off. The ideal candidate is hands-on, technically strong, and capable of leading and mentoring verification engineers.

Responsibilities

- Define verification strategy, scope, and execution plans for unit-level and subsystem-level blocks.
- Build, maintain, and enhance reusable UVM-based verification environments.
- Develop constrained-random and directed tests for functional correctness, corner cases, and error scenarios.
- Verify complex protocols including AXI, NoC routing, ordering, flow control, and coherency-related behaviors.
- Develop and review SystemVerilog Assertions (SVA) for protocol, control, and low-power checks.
- Drive functional, code, and assertion coverage to closure with clear sign-off criteria.
- Lead debug of complex failures across RTL, testbench, and system-level interactions.
- Mentor and technically guide junior verification engineers; conduct reviews of testbenches and checkers.
- Work closely with RTL design, architecture, and physical design teams to resolve issues and close gaps.
- Support regression management, triage, and verification sign-off activities.
- Contribute to verification documentation, methodologies,



and best practices.

Requirements

- 5-8 years of hands-on RTL verification experience in ASIC or advanced FPGA projects.
- Robust expertise in SystemVerilog, UVM, and SystemVerilog Assertions (SVA).
- Proven experience with coverage-driven verification (functional, code, and assertion coverage).
- Solid understanding of digital design concepts, clocking, reset, CDC, and low-power intent.
- Hands-on experience with industry-standard simulators such as VCS, Xcelium, or Questa.
- Ability to own verification deliverables end-to-end and drive them to sign-off.
- Strong debugging, analytical, and communication skills.

Preferred qualifications

- Experience verifying NoCs, AI/ML accelerators, or high-bandwidth interconnect fabrics.
- Exposure to formal verification or hybrid formal-assisted flows.
- Experience with low-power verification using UPF (power domains, isolation, retention).
- Familiarity with performance, stress, and corner-case verification scenarios.
- Experience working in cross-functional or multi-site engineering teams.

Qualifications

- B.Tech / B.E. in Electronics, Electrical Engineering, or Computer Science.
- M.Tech / MS is a plus.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 RTL Verification Lead (India)
🏢 Tosil System
📍 India